DC Field | Value | Language |
---|---|---|
dc.contributor.author | Stanković, Radomir | en |
dc.contributor.author | Stanković, Milena | en |
dc.contributor.author | Astola, Jaakko | en |
dc.contributor.author | Egiazarian, Karen | en |
dc.date.accessioned | 2020-05-01T20:29:17Z | - |
dc.date.available | 2020-05-01T20:29:17Z | - |
dc.date.issued | 2001-01-01 | en |
dc.identifier.isbn | 978-0-7695-1083-3 | - |
dc.identifier.issn | 0195-623X | en |
dc.identifier.uri | http://researchrepository.mi.sanu.ac.rs/handle/123456789/2133 | - |
dc.description.abstract | In this paper, we extend various Boolean representations for switching functions, as SOPs, Reed-Muller expressions, Kronecker, and Pseudo Kronecker ANDEXOR expressions, to functions used in Fibonacci interconnection topologies. Then, we extend the world-level expressions, as arithmetic expressions, and Walsh expressions, to these functions. We introduce the corresponding decision diagrams as graphic representations of these bit-level and word-level expressions, In this way, we proVide a base to extend the application of powerful CAD design tools using polynomial expressions and DDs for switching functions to functions in Fibonacci interconnection topologies. | en |
dc.publisher | IEEE | - |
dc.relation.ispartof | Proceedings of The International Symposium on Multiple-Valued Logic | en |
dc.title | Bit-level and word-level polynomial expressions for functions in Fibonacci interconnection topologies | en |
dc.type | Article | en |
dc.relation.conference | 31st IEEE International Symposium on Multiple-Valued Logic; 22-24 May 2001; Warsaw, Poland | - |
dc.identifier.doi | 10.1109/ISMVL.2001.924588 | en |
dc.identifier.scopus | 2-s2.0-0034838061 | en |
dc.relation.firstpage | 305 | en |
dc.relation.lastpage | 310 | en |
item.cerifentitytype | Publications | - |
item.openairecristype | http://purl.org/coar/resource_type/c_18cf | - |
item.openairetype | Article | - |
item.grantfulltext | none | - |
item.fulltext | No Fulltext | - |
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