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dc.contributor.authorStanković, Radomiren
dc.contributor.authorAstola, Jaakkoen
dc.contributor.authorStanković, Milenaen
dc.contributor.authorEgiazarian, Karenen
dc.date.accessioned2020-05-01T20:29:15Z-
dc.date.available2020-05-01T20:29:15Z-
dc.date.issued2002-08-07en
dc.identifier.issn1065-514Xen
dc.identifier.urihttp://researchrepository.mi.sanu.ac.rs/handle/123456789/2115-
dc.description.abstractIn decision diagrams (DDs) methods for circuit synthesis, it is possible to directly transfer a DD for a given function f into a network realizing f by the replacement of non-terminal nodes in the DD with the corresponding circuit modules. The chief bottleneck of mapping a DD into a network is the inherent feature that the depth of the network produced, is equal to the number of variables in f for this reason, it is proposed a method for small depth circuit synthesis through reachability matrices describing connections among the nodes in the DD for f. In this paper, we first generalized DD methods for circuit design to Fibonacci interconnection topologies through the Fibonacci decision diagrams (FibDDs). Then, we extended the small depth circuit synthesis method to FibDDs. In this way, design methods through DDs are completely transferred from Boolean to Fibonacci topologies.en
dc.publisherHindawi-
dc.relation.ispartofVLSI Designen
dc.subjectCircuit synthesis | Decision diagrams | Fibonacci sequences | Fibonacci transforms | Spectral transforms | Switching functionsen
dc.titleCircuit synthesis from Fibonacci decision diagramsen
dc.typeArticleen
dc.identifier.doi10.1080/10655140290009783en
dc.identifier.scopus2-s2.0-0036316128en
dc.relation.firstpage23en
dc.relation.lastpage34en
dc.relation.issue1en
dc.relation.volume14en
dc.description.rankM23-
item.grantfulltextnone-
item.cerifentitytypePublications-
item.fulltextNo Fulltext-
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.openairetypeArticle-
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