DC FieldValueLanguage
dc.contributor.authorKarpovsky, Marken
dc.contributor.authorStanković, Radomiren
dc.contributor.authorAstola, Jaakkoen
dc.date.accessioned2020-05-01T20:29:14Z-
dc.date.available2020-05-01T20:29:14Z-
dc.date.issued2004-01-01en
dc.identifier.isbn978-0-7803-8251-X-
dc.identifier.issn0271-4310en
dc.identifier.urihttp://researchrepository.mi.sanu.ac.rs/handle/123456789/2103-
dc.description.abstractIn VLSI design, crossings of interconnections occupy space and cause delay. In particular, it is desirable to have planar networks for FPGA synthesis and sub-micron LSIs, since delays in the interconnections and crossings are comparable to the delays for logic circuits. Decision diagrams (DDs). provide a simple technology mapping, and planar DDs result in planar networks. In this paper, we present a deterministic method to construct planar Linearly Transformed Binary Decision Diagrams (BDDs) by Walsh transform spectral coefficients.en
dc.publisherIEEE-
dc.relation.ispartofProceedings - IEEE International Symposium on Circuits and Systemsen
dc.titleConstruction of linearly transformed planar BDD by Walsh coefficientsen
dc.typeConference Paperen
dc.relation.conferenceIEEE International Symposium on Circuits and Systems - Proceedings; Vancouver, BC; Canada; 23 May 2004 through 26 May 2004-
dc.identifier.doi10.1109/ISCAS.2004.1329054-
dc.identifier.scopus2-s2.0-4344688715en
dc.relation.volume4en
item.cerifentitytypePublications-
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.openairetypeConference Paper-
item.grantfulltextnone-
item.fulltextNo Fulltext-
Show simple item record

SCOPUSTM   
Citations

3
checked on Nov 19, 2024

Page view(s)

29
checked on Nov 19, 2024

Google ScholarTM

Check

Altmetric

Altmetric


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.