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dc.contributor.authorStanković, Radomiren
dc.contributor.authorAstola, Jaakkoen
dc.date.accessioned2020-05-01T20:29:13Z-
dc.date.available2020-05-01T20:29:13Z-
dc.date.issued2007-09-03en
dc.identifier.isbn978-0-769-52831-7en
dc.identifier.issn0195-623Xen
dc.identifier.urihttp://researchrepository.mi.sanu.ac.rs/handle/123456789/2085-
dc.description.abstractThere are two basic tasks in exploiting Field Programmable Gate Arrays (FPGAs). First is to decompose a problem to be realized over a collection of basic blocks. The second is to efficiently exploit all the resources available, to be able to perform more on a single chip. In this paper, we suggest possible solutions to these tasks by exploiting spectral methods to represent logic functions to be realized. We show that the decomposition inherent in FFT-like algorithms can be used to decompose a discrete function into subfunctions realizable separately. These subfunctions can be assembled into required functionality by Digital Signal Processors (DSPs) that are already included in some FPGAs. Due to that, the design of larger amounts of logic can be performed over resources that may often remain inefficiently exploited even when resources dedicated to realize logic are exhausted on a given chip.en
dc.publisherIEEE-
dc.relation.ispartofProceedings of The International Symposium on Multiple-Valued Logicen
dc.titleA note on possible applications of fourier representations in circuit design over reprogrammable technological platformsen
dc.typeConference Paperen
dc.relation.conference37th International Symposium on Multiple-Valued Logic, ISMVL 2007; Oslo; Norway; 13 May 2007 through 16 May 2007-
dc.identifier.doi10.1109/ISMVL.2007.4en
dc.identifier.scopus2-s2.0-34548256255en
item.cerifentitytypePublications-
item.openairetypeConference Paper-
item.grantfulltextnone-
item.fulltextNo Fulltext-
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
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